Overview
There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.
Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a "team first" organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for.
Responsibilities & SkillsResponsibilities: Develop ATE test and characterization programs.Develop characterization test plans using established methodologies targeted on chip IP functions and features.Execute characterization of target chip IP features using wafer-level ATE, package-level ATE, and package-level bench platforms across process, temperature, and voltage conditions.Apply statistical analysis on collected characterization data to define key product datasheet parameters and report out results.Identify and analyze to root cause product marginalities, communicating and coordinating root cause closure to appropriate cross-functional team (eg. Applications Engineering, Design Engineering).Design and implement test circuits using FPGA fabric and embedded IP.Develop bench automation and data collection scripts and programs.Design and develop ATE and bench HW.Drive all product issues to resolution.Plan and execute testing of samples (ie. AS, ES), ensuring timely delivery of tested samples to internal and external customers.Analyze and report out on test yield and test time.Qualifications: 7+ years individual contributor in Product or Test Engineering.BS degree (ECE, CoE, EE, Physics).Good working knowledge of semiconductor devices and test methodologies.Experience in ATE test program development, integration, and debug on Nextest Magnum and Advantest T2K required.Experience in hardware development (loadboard, probecard, bench board).Experience in IC characterization and/or failure analysis using various bench tools (Oscilloscope, Pattern Generators, Data Timing Generator, Multimeters, etc).Experience with WAT/etest, wafer sort, package assembly, final test (full backend IC process).Experience in Programmable Logic is desired.Experience in RTL Design, Design Verification an advantage.Knowledge in test, DFT methodologies (ie. scan, BIST), and fault grade methodologies an advantage.Knowledge in Hardware Description Language such as Verilog or VHDL an advantage.Knowledge in programming languages (ie. Python, C++).Knowledge of Statistical Process Control.Proficient in the use of statistical analysis SW (ie. SAS JMP, R).Knowledge in Yield Analysis.Excellent verbal and written English skills. Demonstrated ability to work with multiple groups and across cultures.Good analytical and problem solving abilities.Strong Windows, Unix, and MS Office skills.Curious with strong self-motivation to learn and explore.Benefits
Competitive benefits package including:
Medical (HMO), dental, vision effective on date of hire
Employee Stock Purchase Plan, Well-being Programs, Tuition Reimbursement, and more.
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